Part Number Hot Search : 
SR510 28F00 NTLTD BPC5010 16244A STK4221 10700 UPC1488H
Product Description
Full Text Search
 

To Download 74F537SC Datasheet File

  If you can't view the Datasheet, Please click here to try to view without PDF Reader .  
 
 


  Datasheet File OCR Text:
 74F537 1-of-10 Decoder with 3-STATE Outputs
April 1988 Revised August 1999
74F537 1-of-10 Decoder with 3-STATE Outputs
General Description
The 74F537 is one-of-ten decoder/demultiplexer with four active HIGH BCD inputs and ten mutually exclusive outputs. A polarity control input determines whether the outputs are active LOW or active HIGH. The 74F537 has 3STATE outputs, and a HIGH signal on the Output Enable (OE) input forces all outputs to the high impedance state. Two input enables, active HIGH E2 and active LOW E1, are available for demultiplexing data to the selected output in either non-inverted or inverted form. Input codes greater than BCD nine cause all outputs to go to the inactive state (i.e., same polarity as the P input).
Ordering Code:
Order Number 74F537SC 74F537PC Package Number M20B N20A Package Description 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.
Logic Symbols
IEEE/IEC
Connection Diagram
(c) 1999 Fairchild Semiconductor Corporation
DS009550
www.fairchildsemi.com
74F537
Unit Loading/Fan Out
U.L. Pin Names A0-A3 E1 E2 OE P O0-O9 Description HIGH/LOW Address Inputs Enable Input (Active LOW) Enable Input (Active HIGH) Output Enable Input (Active LOW) Polarity Control Input 3-STATE Outputs 1.0/1.0 1.0/1.0 1.0/1.0 1.0/1.0 1.0/1.0 150/40 (33.3) Input IIH/IIL Output IOH/IOL 20 A/-0.6 mA 20 A/-0.6 mA 20 A/-0.6 mA 20 A/-0.6 mA 20 A/-0.6 mA -3 mA/24 mA (20 mA)
Truth Table
Inputs Function High Impedance Disable Active HIGH Output (P = L) OE E1 H L L L L L L L L L L L L L L Active LOW Output (P = H) L L L L L L L L L L L L
H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance
Outputs
E2 X X L H H H H H H H H H H H H H H H H H H H H H H H H
A3 A2 A1 A0 O0 O1 O2 O3 O4 O5 O6 O7 O8 O9 X X X L L L L L L L L H H H H L L L L L L L L H H H H X X X L L L L H H H H L L X H L L L L H H H H L L X H X X X L L H H L L H H L L H X L L H H L L H H L L H X X X X L H L H L H L H L H X X L H L H L H L H L H X X H L L L L L L L L L L L L H H H H H H H H H H H L H L L L L L L L L L L H L H H H H H H H H H H L L H L L L L L L L L L H H L H H H H H H H H H L L L H L L L L L L L L H H H L H H H H H H H H Z Z Z Z Z Z Z Z Z Z
X H X L L L L L L L L L L L L L L L L L L L L L L L L
Outputs Equal P Input L L L L H L L L L L L L H H H H L H H H H H H H L L L L L H L L L L L L H H H H H L H H H H H H L L L L L L H L L L L L H H H H H H L H H H H H L L L L L L L H L L L L H H H H H H H L H H H H L L L L L L L L H L L L H H H H H H H H L H H H L L L L L L L L L H L L H H H H H H H H H L H H
www.fairchildsemi.com
2
74F537
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
3
www.fairchildsemi.com
74F537
Absolute Maximum Ratings(Note 1)
Storage Temperature Ambient Temperature under Bias Junction Temperature under Bias VCC Pin Potential to Ground Pin Input Voltage (Note 2) Input Current (Note 2) Voltage Applied to Output in HIGH State (with VCC = 0V) Standard Output 3-STATE Output Current Applied to Output in LOW State (Max) twice the rated IOL (mA) -0.5V to VCC -0.5V to +5.5V -65C to +150C -55C to +125C -55C to +150C -0.5V to +7.0V -0.5V to +7.0V -30 mA to +5.0 mA
Recommended Operating Conditions
Free Air Ambient Temperature Supply Voltage 0C to +70C +4.5V to +5.5V
Note 1: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied. Note 2: Either voltage limit or current limit is sufficient to protect inputs.
DC Electrical Characteristics
Symbol VIH VIL VCD VOH Parameter Input HIGH Voltage Input LOW Voltage Input Clamp Diode Voltage Output HIGH Voltage 10% VCC 10% VCC 5% VCC 5% VCC VOL IIH IBVI ICEX VID IOD IIL IOZH IOZL IOS IZZ ICCH ICCZ Output LOW Voltage Input HIGH Current Input HIGH Current Breakdown Test Output HIGH Leakage Current Input Leakage Test Output Leakage Circuit Current Input LOW Current Output Leakage Current Output Leakage Current Output Short-Circuit Current Bus Drainage Test Power Supply Current Power Supply Current 44 -60 4.75 3.75 -0.6 50 -50 -150 500 56 66 10% VCC 2.5 2.4 2.7 2.7 0.5 5.0 7.0 50 V A A A V A mA A A mA A mA mA Min Max Max Max 0.0 0.0 Max Max Max Max 0.0V Max Max V Min Min 2.0 0.8 -1.2 Typ Max Units V V V Min VCC Conditions Recognized as a HIGH Signal Recognized as a LOW Signal IIN = -18 mA IOH = -1 mA IOH = -3 mA IOH = -1 mA IOH = -3 mA IOL = 24 mA VIN = 2.7V VIN = 7.0V VOUT = VCC IID = 1.9 A All Other Pins Grounded VIOD = 150 mV All Other Pins Grounded VIN = 0.5V VOUT = 2.7V VOUT = 0.5V VOUT = 0V VOUT = 5.25V VO = HIGH VO = HIGH Z
www.fairchildsemi.com
4
74F537
AC Electrical Characteristics
TA = +25C Symbol Parameter Min tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPZH tPZL tPHZ tPLZ Propagation Delay An to On Propagation Delay E1 to On Propagation Delay E2 to On Propagation Delay P to On Output Enable Time OE to On Output Disable Time OE to On 6.0 4.0 5.0 4.0 6.0 5.0 6.0 6.0 3.0 5.0 2.0 3.0 VCC = +5.0V CL = 50 pF Typ 11.0 7.5 8.5 6.5 11.0 10.0 11.5 11.0 5.5 9.0 4.0 5.0 Max 16.0 11.0 14.5 9.0 16.0 14.0 18.0 16.0 10.5 13.0 6.0 7.0 TA = 0C to +70C VCC = +5.0V CL = 50 pF Min 6.0 4.0 5.0 4.0 6.0 5.0 6.0 6.0 3.0 5.0 2.0 3.0 Max 17.0 12.0 ns 15.5 10.0 17.0 15.0 ns 20.0 17.0 11.5 14.0 ns 7.0 8.0 Units
5
www.fairchildsemi.com
74F537
Physical Dimensions inches (millimeters) unless otherwise noted
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide Package Number M20B
www.fairchildsemi.com
6
74F537 1-of-10 Decoder with 3-STATE Outputs
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N20A
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 7 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com
www.fairchildsemi.com


▲Up To Search▲   

 
Price & Availability of 74F537SC

All Rights Reserved © IC-ON-LINE 2003 - 2022  

[Add Bookmark] [Contact Us] [Link exchange] [Privacy policy]
Mirror Sites :  [www.datasheet.hk]   [www.maxim4u.com]  [www.ic-on-line.cn] [www.ic-on-line.com] [www.ic-on-line.net] [www.alldatasheet.com.cn] [www.gdcy.com]  [www.gdcy.net]


 . . . . .
  We use cookies to deliver the best possible web experience and assist with our advertising efforts. By continuing to use this site, you consent to the use of cookies. For more information on cookies, please take a look at our Privacy Policy. X